1. Field of the Invention
The invention relates generally to GPS receivers and ore particularly to RF GPS integrated circuits for downconverting a GPS satellite signal.
2. Description of the Prior Art
Global Positioning System (GPS) receivers determine location, velocity, and time by receiving and processing information in GPS signals received from GPS satellites that have been placed in orbit around the Earth by the United States Government. Each GPS satellite uses a distinct pseudo-random noise (prn) code for spreading data for the location-in-space and time-of-transmission for that satellite and transmits the spread data on a carrier frequency that is the same for all the satellites. A GPS receiver uses the distinct prn code for distinguishing the GPS signals from typically at least four satellites and then finds its own location, velocity, and time by solving simultaneous equations using the relative times that the signal from each of the satellites arrives at the receiver and the locations-in-space and times-of-transmission from the satellites.
There is a need for improving the performance of GPS receivers in terms of accuracy, acquisition and tracking of low level signals, acquisition time, and immunity to interference. And, there is a need for reducing the size, power consumption, and cost of the GPS receiver. One of the major components in determining the performance, size, power, and cost in the GPS receiver is the radio frequency (RF) circuitry at the front end for downconverting the GPS satellite carrier frequency to an intermediate or baseband frequency. Due to the relatively high frequency of the GPS satellite signal, most GPS receivers until recently have used discrete components for the front end RF circuitry. Although the performance of such RF circuitry may be very good, these discrete components represent a large portion of the size, power, and cost of a modern GPS receiver. Gallium Arsenide (GaAs) integrated circuits (IC)s have been developed using field effect transistors (FET)s as active devices for replacing the majority of the discrete components in the RF circuitry. Unfortunately, GaAs ICs have been and continue to be relatively expensive because the commercial manufacturing volume of GaAs ICs is low and because the GaAs material is more expensive than Silicon and the processing steps in manufacturing a GaAs IC are relatively difficult. Silicon bipolar ICs using bipolar transistors as active devices have been used for the front end RF circuitry in the GPS receiver. Such ICs can be more difficult to design because the frequency response, noise figure, and power consumption for the silicon IC bipolar transistors are typically not as good as for the GaAs IC FETs. However, the silicon bipolar ICs are less costly and have recently been shown to have sufficient performance for most applications. There continues to be a need for improvements in RF ICs in order to improve performance and reduce size, power consumption, and cost in a GPS receiver.
Existing RF ICs for GPS downconversion require at least a few discrete external components in addition to the IC in order to operate. These external components increase the size and expense of the receiver and typically also increase the power consumption because more current is required to drive an external component through an output interface and an external path than would be required to drive the same component if it were inside the chip. For example, existing RF GPS IC downconverters use a voltage controlled oscillator (VCO) having an off-chip resonator for downconverting the GPS signal to a first intermediate frequency signal. Other existing RF GPS IC downconverters avoid the need for a resonator by constructing the VCO of a ring of amplifiers or gates. However, such ring-type VCO has increased phase noise as compared with a VCO having a resonator. For another example, existing RF GPS IC downconverters use an off-chip filter for filtering the first intermediate frequency signal. Although it is known to be desirable for the VCO resonator and the filter to be integrated into the IC, existing RF bipolar ICs have not done so because the known techniques require prohibitively large surface areas which would increase the cost of the IC. There is a need for an RF GPS downconversion IC having an entirely on-chip first intermediate frequency filter and/or VCO without substantially increasing the size and thereby the cost of the IC.
It is therefore an object of the present invention to provide a radio frequency (RF) GPS integrated circuit (IC) downconverter using an entirely on-chip first intermediate frequency filter.
Another object of the present invention is to provide an RF GPS IC downconverter using an entirely on-chip voltage controlled oscillator (VCO) using a resonator for downconverting a GPS signal.
Briefly, in a preferred embodiment, a GPS receiver of the present invention includes a narrow bandpass radio frequency (RF) filter for filtering a GPS signal at the GPS satellite signal frequency, an RF GPS integrated circuit (IC) of the present invention for receiving the filtered GPS signal and issuing a downconverted signal, a GPS digital signal processor (DSP) for receiving the downconverted signal and issuing a correlation signal, and a microprocessor system for processing the correlation signal and providing a GPS-based location. The RF GPS IC includes a synthesizer for providing a first local oscillator (LO) signal and a complex second LO signal, a first downconverter using the first LO signal for converting a GPS L1 or L2 frequency signal to a first intermediate frequency (IF) signal, a second downconverter using the second LO signal for converting the first IF signal to a complex second IF signal, and a sampler for sampling the second IF signal and issuing I and Q sampled signals. The RF filter is tuned for passing a narrow band about the L1 frequency or the L2 frequency before the GPS signal reaches the RF GPS IC. The first downconverter includes an entirely on-chip filter for filtering the unwanted frequencies from the first IF signal. The synthesizer includes an entirely on-chip phase locked voltage controlled oscillator (VCO) using an on-chip transformer and variable capacitors for a tunable resonator for generating the first LO signal at a frequency of about the mid-point of the L1 and L2 frequencies so that the first and second intermediate frequencies are substantially the same for the L1 or L2 frequencies by using mixing products for frequency differences where the incoming GPS signal is higher or lower, respectively, than the frequency of the LO signal. The synthesizer further includes an amplifier/oscillator for selectably receiving an external reference signal at a reference frequency of about thirteen megahertz or generating an internal reference signal using an external resonator at a historically common GPS reference frequency about twelve and one-half megahertz; and a multi-mode divider for frequency dividing the second LO signal by a first or a second divide number so that the first and second LO frequencies do not change significantly when the reference frequency is changed. The first divide number is a ratio formed by alternating two integer divide numbers in repeating sequences.
An advantage of an RF GPS IC downconverter of the present invention is that cost, size, and power consumption of a GPS receiver are reduced by using a narrow band RF filter and an RF GPS IC downconverter having an entirely on-chip intermediate frequency filter.
Another advantage of the present invention is that the size, cost, and power consumption of a GPS receiver are reduced by using an RF GPS IC downconverter having an entirely on-chip voltage controlled oscillator (VCO) using an on-chip resonator.
These and other objects and advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the various figures.